Computer Organization and Architecture
(COMP-ORG-ARC.AB2) / ISBN : 978-1-64459-572-5
About This Course
The Computer Organization and Architecture course and lab cover the entire field of computer design updated with the most recent research and innovations in computer structure and function. The lab is cloud-based, device-enabled, and can easily be integrated with an LMS. The computer architecture course and lab also provides knowledge on the areas such as I/O functions and structures, RISC, and parallel processors with real-world examples enhancing the text for reader interest.
Skills You’ll Get
Interactive Lessons
29+ Interactive Lessons | 149+ Exercises | 200+ Quizzes | 169+ Flashcards | 169+ Glossary of terms
Gamified TestPrep
42+ Pre Assessment Questions | 57+ Post Assessment Questions |
Hands-On Labs
30+ LiveLab | 14+ Video tutorials | 06+ Minutes
Video Lessons
7+ Videos | 05+ Minutes
Introduction
- What’s New in the Eleventh Edition
- Support of ACM/IEEE Computer Science and Computer Engineering Curricula
- Objectives
- Example Systems
- Plan of the Text
Basic Concepts and Computer Evolution
- Organization and Architecture
- Structure and Function
- The IAS Computer
- Gates, Memory Cells, Chips, and Multichip Modules
- The Evolution of the Intel x86 Architecture
- Embedded Systems
- ARM Architecture
Performance Concepts
- Designing for Performance
- Multicore, Mics, and GPGPUs
- Two Laws that Provide Insight: Amdahl's Law and Little’s Law
- Basic Measures of Computer Performance
- Calculating the Mean
- Benchmarks and Spec
A Top-Level View of Computer Function and Interconnection
- Computer Components
- Computer Function
- Interconnection Structures
- Bus Interconnection
- Point-to-Point Interconnect
- PCI Express
The Memory Hierarchy: Locality and Performance
- Principle of Locality
- Characteristics of Memory Systems
- The Memory Hierarchy
- Performance Modeling of a Multilevel Memory Hierarchy
Cache Memory
- Cache Memory Principles
- Elements of Cache Design
- Implementing Cache Controllers
- Intel x86 Cache Organization
- The IBM z13 Cache Organization
- Cache Performance Models
Internal Memory
- Semiconductor Main Memory
- Error Correction
- DDR DRAM
- eDRAM
- Flash Memory
- Newer Nonvolatile Solid-State Memory Technologies
External Memory
- Magnetic Disk
- RAID
- Solid State Drives
- Optical Memory
- Magnetic Tape
Input/Output
- External Devices
- I/O Modules
- Programmed I/O
- Interrupt-Driven I/O
- Direct Memory Access
- Direct Cache Access
- I/O Channels and Processors
- External Interconnection Standards
- IBM z13 I/O Structure
Operating System Support
- Operating System Overview
- Scheduling
- Memory Management
- Intel x86 Memory Management
- ARM Memory Management
Number Systems
- The Decimal System
- Positional Number Systems
- The Binary System
- Converting Between Binary and Decimal
- Hexadecimal Notation
Computer Arithmetic
- The Arithmetic and Logic Unit
- Integer Representation
- Integer Arithmetic
- Floating-Point Representation
- Floating-Point Arithmetic
Digital Logic
- Boolean Algebra
- Gates
- Combinational Circuits
- Sequential Circuits
- Programmable Logic Devices
Instruction Sets: Characteristics and Functions
- Machine Instruction Characteristics
- Types of Operands
- Intel x86 and ARM Data Types
- Types of Operations
- Intel x86 and ARM Operation Types
- Appendix 13A Little-, Big-, and Bi-Endian
Instruction Sets: Addressing Modes and Formats
- Addressing Modes
- x86 and ARM Addressing Modes
- Instruction Formats
- x86 and ARM Instruction Formats
Assembly Language and Related Topics
- Assembly Language Concepts
- Motivation For Assembly Language Programming
- Assembly Language Elements
- EXAMPLES
- Types of assemblers
- Assemblers
- Loading and Linking
Processor Structure and Function
- Processor Organization
- Register Organization
- Instruction Cycle
- Instruction Pipelining
- Processor Organization for Pipelining
- The x86 Processor Family
- The ARM Processor
Reduced Instruction Set Computers
- Instruction Execution Characteristics
- The Use of a Large Register File
- Compiler-Based Register Optimization
- Reduced Instruction Set Architecture
- RISC Pipelining
- RISC-V Instructions
- MIPS R4000
- SPARC
- Processor Organization For Pipelining
- CISC, RISC, And Contemporary Systems
Instruction-Level Parallelism and Superscalar Processors
- Overview
- Design Issues
- Intel Core Microarchitecture
- ARM Cortex-A8
- ARM Cortex-A53
- ARM Cortex-M3
Control Unit Operation and Microprogrammed Control
- Micro-Operations
- Control of the Processor
- Hardwired Implementation
- Microprogrammed Control
Parallel Processing
- Multiple Processor Organizations
- Symmetric Multiprocessors
- Cache Coherence and the MESI Protocol
- Multithreading and Chip Multiprocessors
- Clusters
- Nonuniform Memory Access
Multicore Computers
- Hardware Performance Issues
- Software Performance Issues
- Multicore Organization
- Heterogeneous Multicore Organization
- INTEL Core i7 Memory Hierarchies
- The ARM Cortex-A53 and Intel Core i7 Memory Hierarchies
- INTEL Core i7-5960X
- INTEL Core i7 6700
- ARM Cortex-A15 MPCore
- IBM z13 Mainframe
Appendix A: System Buses
- A.1 Bus Structure
- A.2 Multiple-Bus Hierarchies
- A.3 Elements of Bus Design
Appendix B: Victim Cache Strategies
- B.1 Victim Cache
- B.2 Selective Victim Cache
Appendix C: Interleaved Memory
Appendix D: The International Reference Alphabet
Appendix E: Stacks
- E.1 Stacks
- E.2 Stack Implementation
- E.3 Expression Evaluation
Appendix F: Recursive Procedures
- F.1 Recursion
- F.2 Activation Tree Representation
- F.3 Stack Implementation
- F.4 Recursion and Iteration
Appendix G: Additional Instruction Pipeline Topics
- G.1 Pipeline Reservation Tables
- G.2 Reorder Buffers
- G.3 Tomasulo’s Algorithm
- G.4 Scoreboarding
Basic Concepts and Computer Evolution
- Installing a CPU Fan on a Motherboard
- Installing Motherboard Components
- Installing a Motherboard, Processor, and Processor Fan
- Installing an Expansion Card on a Motherboard
Performance Concepts
- Calculating the Mean
A Top-Level View of Computer Function and Interconnection
- Installing Input and Output Devices
- Identifying a PCI Bus Slot
The Memory Hierarchy: Locality and Performance
- Determining the Characteristics of Memory Devices in a Memory Architecture
Cache Memory
- Determining L3 Cache Sizes for The Processors
Internal Memory
- Determining Semiconductor Memory Types and Their Erasure Processes
- Installing DDR5 RAM on a Motherboard
External Memory
- Connecting the Motherboard to the Internal Hard Disk
Input/Output
- Installing an NIC on a Motherboard of a CPU
- Connecting a New Workstation to the Internet
- Connecting a USB Printer
Operating System Support
- Configuring a Wireless Client
Number Systems
- Converting Fraction Decimal Number into Equivalent Binary Number
Computer Arithmetic
- Converting Decimal Number into Two's Complement Binary Number
Digital Logic
- Identifying Types of Logic Gates
Instruction Sets: Addressing Modes and Formats
- Identify the Addressing Mode
Assembly Language and Related Topics
- Using Greatest Common Divisor
Processor Structure and Function
- Installing an i7 Processor on a Motherboard
Reduced Instruction Set Computers
- Determining Characteristics of Processors
Instruction-Level Parallelism and Superscalar Processors
- Understanding the Intel Core Microarchitecture
Control Unit Operation and Microprogrammed Control
- Understanding The Functioning of Microprogrammed Control Unit
Parallel Processing
- Determing the Types of Parallel Processor Systems
- Installing Memory Modules on a Motherboard
Multicore Computers
- Identifying Chip Organizations
- Identifying Levels of Cache
- Determining ARM ACE Cache Line States